EDN

Xilinx says new IP core will support PCI Express

Continuing a tradition of offering the latest I/O technology in programmable form before it's available in standard chips, Xilinx Inc. today is unveiling what it claims is the first IP core to support ...
Design-Reuse

Xilinx Pcie specification IP Listing

Rambus PCIe 3.0 Controller is a highly configurable PCIe 3.0 interface Soft IP designed for ASIC and FPGA implementations supporting endpoint, root port, switch, bridge and advanced features ...
Business Wire

Enyx Premieres 25G TCP and UDP Offload Engines with Xilinx Virtex UltraScale+ 16nm FPGA on BittWare’s XUPP3R PCIe Board

SALT LAKE CITY--(BUSINESS WIRE)--SC16 Conference — Enyx is pleased to announce the 25G version of its enterprise-class TCP/IP, UDP/IP and MAC Intellectual Property ...
Design News

New Xilinx Virtex-6 and Spartan-6 FPGA Connectivity Development Kits Include Northwest Logic DMA Engine IP

SOFTWARE/HARDWARE: Xilinx Inc. recently announced the availability of the new Xilinx ® Virtex ®-6 and Spartan ®-6 FPGA Connectivity Development Kits that provide a comprehensive, easy-to-use, and ...
Design-Reuse

Xilinx pcie pmda IP Listing

Rambus PCIe 5.0 Controller is a configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementation. Rambus PCIe 5.0 Controller is compliant with the PCI Express 5.0 ... Rambus ...