EDN

Streamlining the SoC Design Flow

In SoC design, a streamlined verification and analysis flow can contribute significantly to the success of a product. With manufacturing yield and time-to-market schedules crucial, it is important to ...
EDN

Reshaping the SoC power design flow

Power integrity has become one the most critical issues as chip designs have transitioned to 130nm and 90nm processing technologies. Decreasing supply voltages, increasing device density and leakage ...
Semiconductor Engineering

Earlier SoC Design Exploration And Verification Gets Better Designs To Tapeout Faster

Between the complexity of advanced node design verification and the competition to be first to the market, system-on-chip (SoC) designers no longer have the luxury of waiting until each sub-block of a ...
Nasdaq

Synopsys and Samsung Foundry Announce Reference Flow for Predictable Execution of ASIL D-Compliant SoC Design for Automotive Applications

Samsung Foundry and Synopsys' optimized flow achieves predictable execution of in-system test, implementation, verification, timing and physical signoff for ASIL D-compliant SoC design Includes ...