Editor's Note: Although the primary target market for the 86100CU-400 application presented below is for ASIC/SoC designs, I'm assured by the folks at Agilent that this application is also applicable ...

I have always had a soft spot for phase-locked loops – at least, I have since I first found out what they were. What I like about them is that they servo into the best answer for a given situation – ...

Scientists have developed an advanced phase-locked loop (PLL) frequency synthesizer that can drastically cut power consumption. This digital PLL could be an attractive building block for Bluetooth Low ...

The phase locked loop, or PLL, is a real workhorse of circuit design. It is a classic feedback loop where the phase of an oscillator is locked to the phase of a ...

One of the most challenging tasks in analog circuit design is to adapt a functional block to ever new CMOS process technology. For digital circuits the number of gates per square mm approx. doubles ...

A phase-locked loop (PLL) is a feedback system that combines a voltage-controlled oscillator (VCO) and a phase detector in such a way that the oscillator signal tracks an applied frequency or ...

Two innovative design techniques lead to substantial improvements in performance in fractional-N phase locked loops (PLLs), report scientists from Tokyo Tech. The proposed methods are aimed to ...

…which would take a pulse-width-modulated waveform at any frequency, and produce a signal with exactly the same mark/space ratio, but at a nominated frequency (see ‘Why might this be useful?’ below).

In sensitive optical applications, obtaining the most precise measurements often involves stabilizing the laser with an external reference. One way to synchronize the phase of a signal is by using a ...