Embedded

CPU plus FPGA design flow for software developers: A new tangible reality

Recently, Brian Bailey organized a round table that resulted in a two-part article called Supporting CPUs Plus FPGAs. The experts discussed the evolving reality of systems design based on FPGAs and ...
EDN

Synopsys takes another stab at FPGA synthesis

SAN JOSE, Calif. — Making its fourth run at FPGA synthesis, Synopsys Inc. has tweaked its Design Compiler ASIC synthesis tool to enable designers to use the same tools and potentially the same design ...
Business Wire

Starbridge and Impulse Collaborate on C-to-FPGA Acceleration

KIRKLAND, Wash. & SALT LAKE CITY--(BUSINESS WIRE)--Starbridge Systems and Impulse Accelerated Technologies today announced a joint initiative to provided graphical and C-language tools for ...
EDN

Design Compiler FPGA

The Best FPGA Synthesis for ASIC Prototyping–Design Once!Design Compiler FPGA is the only solution available today that is targeted specifically for designers who prototype ASICs using high-end FPGAs.
WatersTechnology

Impulse Announces C-to-HDL FPGA Compiler

Impulse Accelerated Technologies has announced the latest version of its C-to-HDL compiler, providing field-programmable gate array (FPGA) coding support for Arista Switch users. FPGAs, which are ...
Design-Reuse

Synopsys steps up efforts in FPGA design tools

SAN MATEO, Calif. — Once thought of as paying only lip service to FPGA tools, Synopsys Inc. is now acting like a serious player in high-end FPGA design. The company recently announced it has developed ...
New Electronics

Multi fpga partitioning software offers ‘unlimited design capacity’

FPGA based prototyping specialist Flexras Technologies has launched Wasga Compiler, a software tool designed to assist those developing large asics and SoCs by boosting multi fpga design performance ...
Semiconductor Engineering

Embedded GPU for FPGA, Achieving Over 770 MHz Operating Frequency With Unconstrained Compile

A technical paper titled “eGPU: A 750 MHz Class Soft GPGPU for FPGA” was published by researchers at Intel Corporation and Imperial College London. “This paper introduces the eGPU, a SIMT soft ...
Electronic Design

Updated C-to-FPGA Compiler Accelerates Image Processing

Version 3.7 of CoDeveloper C-to-FPGA compiler includes performance improvements, wider Linux support, and more parallel hardware optimization features including higher-throughput streaming I/O.
insideHPC

Gidel FPGA Tools Speed Development with Intel’s HLS

Today Gidel announced the availability of new development tools that take advantage of Intel’s HLS, producing a speed increase of 5x over prior development options. Intel’s High Level Synthesis (HLS) ...
Design News

Compilation in the Cloud

Though it’s been nearly a month since NI (National Instruments) Week 2010, one of the presentations in particular has stayed top of mind for its potential in a variety of automation and OEM equipment ...